1. Field of the Invention
The present invention relates to a solid-state image pickup device and a manufacturing method thereof, and a semiconductor integrated circuit device and a manufacturing method thereof.
2. Description of the Related Art
A related-art, solid-state image pickup device includes a semiconductor substrate in which circuit elements, interconnection layers and the like are formed on the surface side thereof and in which photodiodes and the like are formed on the back side thereof to introduce light from the surface side of the semiconductor substrate to pick up an image.
However, in the case of such an arrangement, incident light is absorbed or reflected on the circuit elements. The interconnection layers and the like are formed on the surface side of the semiconductor substrate so that efficiency at which incident light is photoelectrically converted is low. Thus, sensitivity of the solid-state image pickup device is lowered.
Accordingly, in order to solve such a problem, a so-called back-illuminated type solid-state image pickup device has been proposed, in which circuit elements, interconnection layers and the like are formed on the surface side of the semiconductor substrate; photodiodes are formed on the back side of the semiconductor substrate and light is introduced from the back side of the semiconductor substrate to pickup an image, to increase an aperture ratio, to receive incident light and to suppress absorption of reflection of incident light (see cited patent reference 1, for example).
On the other hand, since a semiconductor integrated circuit device is progressively increased in integration degree as elements are increasingly microminiaturized in recent years, then the number of gates used in a transistor is increased considerably, and hence the layout of an interconnection layer for interconnecting the cells of a logic circuit and for interconnecting the blocks of micro-function becomes complex.
Although it is desirable that the interconnection layer should interconnect the cells or the blocks with the shortest distance or with an equal distance, depending upon the layout circumstances, it becomes difficult for the interconnection layer to interconnect the cells or the blocks with the shortest distance or the equal distance.
In order to solve the above-mentioned problem, there has been proposed a method for forming interconnection layers not only on the surface side of the semiconductor substrate but also on the back side of the semiconductor substrate (see cited patent reference 2, for example).
[Cited patent reference 1]: Official gazette of Japanese laid-open patent application No. 2003-31785
[Cited patent reference 2]: Official gazette of Japanese laid-open patent application No. 9-260699
In the above-mentioned back-illuminated type solid-state image pickup device, in order to introduce incident light from the back side of the semiconductor substrate, the back side of the semiconductor substrate should be decreased in film thickness after the circuit elements and the photodiodes and the like are formed on the front side of the semiconductor substrate.
However, when the back side of the semiconductor substrate is decreased in film thickness, it is unavoidable that flatness of the semiconductor substrate cannot be obtained due to stress inherent in the semiconductor substrate and that the semiconductor substrate becomes weak from a mechanical standpoint.
Accordingly, as a method for solving such a problem, a supporting substrate is to be bonded to the semiconductor substrate before the back side of the semiconductor substrate is decreased in film thickness.
Manufacturing processes for manufacturing the back-illuminated type solid-state image pickup device according to this method will be described with reference to FIGS. 1A to 1F.
First, as shown in FIG. 1A, there is prepared an SOI (silicon on insulator) substrate 65 in which a single crystal silicon layer (so-called SOI layer) 64 is formed on a silicon substrate 62 through a buried oxide film (so-called BOX layer) 63, for example.
Next, a photodiode PD is formed on the SOI substrate 65 at the predetermined position within the single crystal silicon layer 64.
Then, a MOS (metal-oxide semiconductor) type transistor Tr1 and a CMOS (complementary MOS) type Tr2, each of which comprises a gate electrode 66 and a pair of a source region and a drain region, are formed on the single crystal silicon layer 64 at the predetermined positions through an insulating film (not shown), thereby exhibiting the state shown in FIG. 1B.
Next, a multilayer interconnection layer 68 (681, 682, 683) is formed on the single crystal silicon layer 64 at the positions corresponding to the MOS type transistor Tr1 and the CMOS type transistor Tr2 through an insulating layer 67, thereby exhibiting the state shown in FIG. 1C.
Next, a planarized film (not shown) is formed on the insulating layer 67, and a supporting substrate 70 is attached to the insulating layer 67 by coating an adhesive layer 69 on this planarized layer, thereby exhibiting the state shown in FIG. 1D.
Next, this back-illuminated type solid-state image pickup device is reversed up and down and thereby the back side of the SOI substrate 65, that is, the silicon substrate 62 is exposed.
Then, the exposed silicon substrate 62 and the buried oxide film 63 are removed, whereby the single crystal silicon layer 64 of the SOI substrate 65 is exposed as shown in FIG. 1E.
After that, as shown in FIG. 1F, an insulating film 72, an antireflection film, a planarized film (not shown) and the like are formed on the back side of the single crystal silicon layer 64, and an on-chip microlens 74 is formed on back side of the single crystal silicon layer 64 at its portion corresponding to the photodiode PD through a color filter 73.
In this manner, there can be obtained a back-illuminated type CMOS solid-state image pickup device 60.
In the process in which the supporting substrate 70 is bonded to the insulating layer 67 by coating the adhesive layer 69 on the insulating layer 67 on the semiconductor substrate 64 as was shown in FIG. 1D, the heat treatment is carried out in order to cure the adhesive layer 69 or to increase bonding strength at which the supporting substrate 70 is bonded to the insulating layer 67.
However, when this heat treatment is carried out at a high temperature ranging from 900° F. to 1100° F. under which temperature the SOI substrate has been manufactured so far, for example, it is unavoidable that a thermal influence is exerted upon the multilayer interconnection layer 68 (681, 682, 683) previously formed on the surface side of the single crystal silicon layer 64 and which is made of a material with low heat-resistance (Al, Cu and the like).
Also, although there is known a method of using boron phosphorus silicate glass (BPSG), phosphorus silicate glass (PSG), boron silicate glass (BSG) and the like as the material of the adhesive layer 69, since this method also uses heat treatment at a temperature ranging of from 700° C. to 900° C., it is unavoidable that a thermal influence is exerted upon the interconnection layer 68 (681, 682, 683) which was previously formed on the surface side of the single crystal silicon layer 64.
Accordingly, these high temperature heat treatments cannot be applied to the case in which the back-illuminated type solid-state image pickup device is manufactured.
Further, there is known a method of using coated glass (SOG) as the material of the adhesive layer 69 because the coated glass (SOG) can realize a planarized layer.
However, in this case, in the thin film forming processes shown in FIGS. 1D and 1E, if wet etching process is carried out, then the SOG is corroded (etched) by liquid medicine and hence bonding strength is lowered.
Further, uneven coated portions are formed depending upon the kind of the material of the adhesive layer 69 so that holes, voids and the like are formed on the interface in which the insulating layer 67 and the supporting substrate 70 are bonded together.
Also, there is proposed a method of directly bonding the single crystal silicon layer 64 and the supporting substrate 70 without coating the adhesive layer 69 on the insulating layer 67. According to this known method, since the heat treatment is carried out at 1000° C. for 10 hours, it is unavoidable that a thermal influence is exerted upon the interconnection layer 68 (681, 682, 682) which was previously formed on the surface side of the semiconductor substrate.
Further, there is proposed a method of bonding the single crystal silicon layer 64 and the supporting substrate 70 by using an adhesive tape without coating the adhesive layer 69 on the insulating layer 67. In this case, if a thick adhesive tape is used, then a problem in which the adhesive tape is torn off does not arise. However, since the adhesive tape is warped considerably after the heat treatment, a problem arises, in which an exposure process cannot be made in the following manufacturing processes.
While the case in which the solid-state image pickup device is manufactured from the SOI substrate 65 composed of a plurality of layers has been described so far by way of example, a similar problem arises also in the case in which the solid-state image pickup device having the above-mentioned arrangement is manufactured from a single layer of a silicon substrate, for example.
Also, not only in the above-mentioned back-illuminated type solid-state image pickup device but also in a semiconductor integrated circuit device, it is considered that a multilayer interconnection layer may be formed on the semiconductor substrate on which the circuit elements are formed.
Then, when such semiconductor integrated circuit device is manufactured, in order to obtain desired characteristics in the circuit elements such as transistors, it is frequently observed that the semiconductor substrate with the circuit elements formed thereon should be decreased in thickness.
Accordingly, in such a case, a problem similar to that of the case in which the back-illuminated type solid-state image pickup device is manufactured arises unavoidably.